How registers and shift registers work, the four shift register types, Verilog including an LFSR, and where they are used.
Browsing: Digital Design
Binary, modulo-N, ring, Johnson and Gray counters, a modulo-N counter in Verilog, and how to divide clocks safely.
Mealy vs Moore FSMs compared with state diagrams, a clean Verilog template, state encoding and design tips.
Synchronous vs asynchronous reset compared, Verilog for each, how to release reset safely, and what to reset.
What setup and hold time mean, the timing equations, how to fix each kind of violation, and the link to metastability.
How D, JK, T and SR flip-flops work, their characteristic tables, edge triggering, and Verilog for each.
How SR and D latches work, how they differ from flip-flops, and how to avoid accidental latches in Verilog.
What sequential logic is, the structure of synchronous circuits, synchronous vs asynchronous design, and how to write sequential RTL.
How decoders, encoders and priority encoders work, one-hot encoding, and Verilog for each.
How multiplexers and demultiplexers work, using a mux as universal logic, and Verilog examples.