The short answer: the best VLSI projects are small enough to finish and deep enough to explain. I would start with a UART or an FSM, move to a FIFO, SPI or AXI-Lite design with a proper testbench, and then build one portfolio piece such as a pipelined RISC-V core or a small accelerator. One well-finished project beats five half-done ones.
Projects are what make your resume believable. But I see a lot of students pick something huge, like “design a GPU”, get stuck, and end up with nothing to show. Here is how I would choose projects, by level, and what makes a project actually impress an interviewer.
- Projects by level
- Beginner projects
- Intermediate projects
- Advanced portfolio projects
- What makes a project impressive
Table of Contents
Part 1: Projects by level
Part 2: Beginner projects
- Traffic light controller: a classic FSM. Add a pedestrian button to make it interesting.
- UART transmitter and receiver: teaches baud rate generation, shift registers and FSMs.
- PWM generator: counters and comparators, easy to see on an LED.
- Stopwatch or clock on an FPGA: counters, display multiplexing and debouncing.
Part 3: Intermediate projects
- Synchronous and asynchronous FIFOs: the asynchronous one teaches Gray-code pointers and CDC, a favourite interview topic.
- SPI or I2C controller: real protocols with timing details.
- AXI-Lite slave with a UVM testbench: shows both design and verification skills.
- Round-robin arbiter: small but full of interesting corner cases.
Part 4: Advanced portfolio projects
- Pipelined RISC-V core: hazards, forwarding and running real programs. One of the strongest projects you can show.
- Cache controller: hits, misses, write policies and a memory interface.
- Small systolic-array accelerator: the hardware behind AI, with MACs and INT8 datapaths.
- RTL-to-GDS on an open PDK: take any of the above through OpenLane and show the layout.
Part 5: What makes a project impressive
- A README with a block diagram, the spec, and how to run it.
- A self-checking testbench, not just waveforms you eyeballed.
- Waveform screenshots of the interesting parts.
- Results: timing, area or coverage numbers if you have them.
- A section on what went wrong: the hardest bug and how you found it. Interviewers love this.
Practise this on VLSI Forge
I built VLSI Forge so you can write RTL in your browser, run it on a real simulator and check every signal in the waveform. Free, nothing to install.
FIFO, FSM and protocol problems · Build a RISC-V CPU step by step · Build an NPU
Pick one project from your level this week, and finish it properly. That alone puts you ahead of most applicants.
FAQ
How many projects do I need on my resume?
Two strong ones are enough: one smaller and polished, one bigger that you can talk about in depth.
Should I do projects on FPGA or just simulation?
Simulation is enough for most ASIC roles. An FPGA board is a great bonus, especially for FPGA roles.
Is a RISC-V CPU project too common?
It is common because it is valuable. What makes yours stand out is depth: pipelining, hazards, tests and clear explanations.
Can I use AI tools to help with projects?
Yes, as a helper, but make sure you understand and have verified every line. Interviewers will ask you to explain it.
